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Chapter 1: About This MegaCore Function
Performance and Resource Utilization
Figure 1–2 shows the regression flow.
Figure 1–2. Regression Flow
Parameter
Perl
Script
Sweep
Compare
Results
NCO Compiler
Wizard
Testbench
All Languages
Bit
Accurate
Model
Output
File
Verilog HDL
Output
File
VHDL
Output
File
Synthesis
Structure
Output
File
Performance and Resource Utilization
This section shows typical expected performance for a NCO MegaCore function using
the Quartus II software and a target f MAX set to 1GHz with Cyclone III and Stratix IV
devices.
1
Cyclone III devices use combinational look-up tables (LUTs) and logic registers;
Stratix IV devices use combinational adaptive look-up tables (ALUTs) and logic
registers. It may be possible to significantly reduce memory utilization by setting a
lower target f MAX .
Table 1–4 shows performance figures for Cyclone III devices.
Table 1–3. NCO MegaCore Function Performance—Cyclone III Devices
Accumulator
Angular
Magnitude
Combinational
Logic
Memory
9×9
f MAX
Width
Precision
Precision
LUTs
Registers
Bits
M9K
Blocks
(MHz)
Large ROM
(1)
32
12
12
156
149
98,304
12
—
336
Multiplier-Based
(1)
NCO MegaCore Function
User Guide
November 2013 Altera Corporation
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